
Field Pioneer and Higher Education Innovator
Professor Kin-Leong Pey's academic journey is marked by numerous significant contributions to education, science and technology. He was the Founding Associate Provost of Education of Singapore University of Technology Design and is currently starting another new 21st Century University called NEOM University in Saudi Arabia.
Explore his research, publications, and the remarkable achievements that define his career in education and innovation.
About Me.
Dynamic Senior Vice Provost for Student Success with more than 20 years of experience in higher education leadership, dedicated to advancing student achievement and innovative learning environments. Proven expertise in interdisciplinary program development and innovation, fostering an inclusive academic culture that empowers students and faculty alike. Recognized for pioneering educational initiatives that integrate technology and design thinking and innovation, significantly enhancing curriculum and institutional reputation. Committed to driving strategic growth and academic excellence through collaborative leadership and a forward-thinking approach. Familiar with lifelong and applied learning in Singapore education industry.
NEOM
Kin-Leong PEY has served as Senior Vice Provost for Student Success at NEOM University, Saudi Arabia, since February 2024. In this second university start-up, he has been instrumental in designing an undergraduate framework featuring a two-year CS-X Core curriculum focused on digital thinking and integrated co-living and learning, followed by interdisciplinary programs in Years 3 and 4. By leveraging Graduate Attributes to define learning outcomes at institutional, program, and course levels, and complementing them with a student-centric affairs and management blueprint, these integrative degrees aim to transform higher education in the rapidly evolving AI era.
SUTD
Before joining NEOM University, Kin-Leong was appointed by Singapore’s Ministry of Education as Founding Associate Provost of Education to establish SUTD’s undergraduate program in 2010. His pioneering efforts led to global recognition, with the engineering curriculum ranked as a “Top Emerging Leader in Engineering Education” in an MIT benchmarking study on the global state of the art in engineering education (http://news.mit.edu/2018/reimagining-and-rethinking-engineering-education-0327). SUTD achieved full ABET-equivalent accreditation for its three engineering programs in 2017 and 2022, and its Master of Architecture program was certified by the Singapore Board of Architects in 2018.
In 2019, Kin-Leong led a major revamp of SUTD’s Freshmore curriculum and introduced “Design and AI” (DAI), an interdisciplinary degree combining AI with human-centric design, now a flagship program in the AI era. By 2023, more than 3,500 graduates from the five SUTD undergraduate programs were contributing to twenty-two of Singapore’s twenty-five economic sectors, with employment rates consistently above 90% within six months of graduation. These outcomes demonstrate how SUTD’s innovative programs address 21st-century challenges in a VOCA/BANI world by delivering human-centered solutions to real-world problems.
During the COVID-19 pandemic, Kin-Leong oversaw significant curricular adjustments to overcome social distancing and quarantine constraints on team-based, hands-on learning. Initiatives included flexible grading options for capstone projects and the development of cyber-physical learning platforms to prepare for future disruptions such as Virus-X. These measures have left a lasting impact on SUTD’s undergraduate education model.
Kin-Leong also founded the SUTD Academy in 2017 for lifelong learning and the Office of Digital Learning in 2022 to advance a cyber-physical campus initiative, campus-X. He held the Kwan Im Thong Hood Cho Temple Chair Professorship in Healthcare Engineering (2019–2023), collaborating with Changi General Hospital and Duke-NUS Medical School on academic and research programs such as a through-train pathway enabling SUTD’s BEng and Architecture graduates to pursue medical degrees.
Nanyang Technological University and Early Career
Prior to SUTD, Kin-Leong was Head of the Microelectronics Division and Director of both the Nanyang NanoFabrication Center and Microelectronic Centre at the Nanyang Technological University’s School of Electrical and Electronic Engineering. He also held a fellowship in the Singapore-MIT Alliance (1999-2011), served as faculty at NUS (1998-2000),.
Also, proven track-records in working under harsh, dynamic and uncertain environment. Worked in semiconductor industry for about 7 years including about 2 years in a wafer fabrication plant (Chartered Semiconductor Manufacturing) and 1.5 years in an IC wafer test and packaging plant (Agilent Technologies).
Professional Association
Kin-Leong played a key role in advancing IEEE professional activities and programs in Singapore. His contributions include 1) serving as General Chair of the IEEE IPFA 2001 (Singapore) and Co-General Chair of IEEE IPFA 2004 (Taiwan), 2) acting as Guest Editor for IEEE Transactions on Device and Materials Reliability in 2003–2005 and 2007, 3) chairing the Singapore IEEE joint REL/CPMT/EDS Chapter for five terms (2004, 2005, 2009, 2020 and 2021), 4) serving as a Board Member of IEEE IPFA since 2001, 5) contributing as a member in the IEEE joint REL/CPMT/EDS Chapter since 2000, and 6) serving as an Editor of IEEE Transactions on Device and Materials Reliability since 2009. He established the IEEE Student Branch (2013) and IEEE EDS Student Society (2015) at the Singapore University of Technology and Design, serving as advisor until February 2024.
Kin-Leong served as Chair of an international review panel under the Washington Accord for a five-year periodic major evaluation of China’s engineering program accreditation, covering CAST and CEEAA. The review was completed successfully between September 2022 and May 2023 despite COVID-19-related challenges.
Research and Outcomes
Kin-Leong has published 288 peer-reviewed publications, 348 technical/education conference papers and presentations, six book chapters, and holds 44 U.S. patents. His contributions include fifteen keynote addresses and 120 invited talks. In addition, he has one company trade secret in self-aligned silicide cleaning technology in wafer fabrication. He has also authored twenty-eight foresight and academic reports on higher education innovation and transformation.
He has supervised 42 Ph.D. and 23 Master’s theses and secured over S$11.5 million (S$8.183M as PI and S$2.915M as co-PI) in research funding. As the acting Co-director of the SUTD-MIT International Design Center, he managed USD100M research funding with his counterparts at MIT.
Key Public Services and Recognitions
Dr. Pey chairs the Governing Board of Singapore’s National Synchrotron Programme and serves as President of the Higher Education Planning in Asia (HEPA) Association.
He previously served on the Board of Governors, Temasek Polytechnic, the Chair of the Advisory Board, School of Electrical and Electronics Engineering, Singapore Polytechnic, and the Engineering Advisory Committee, Ngee Ann Polytechnic Council, Singapore.
His honors include the Singapore Public Administration Medal (Silver, 2016), the COVID-19 Resilience Medal (2023), and the Service to Education Award (2023). He was conferred the title of Honorary Professor by SUTD in recognition of his extraordinary contributions in setting up the innovative education programs at SUTD.
The blend of research achievement and human-centered teaching and learning leads me to be rare kind of education innovator and researcher - one who can build bridges between silicon chips and student minds and bring learning to life, fun and lifelong.
Education Innovation
Kick-started and established two universities from ground zero under very different environments and cultures – SUTD in Singapore (2010-2023) by successfully incorporating Design Thinking and Innovation into technical and professional (Engineering and Architecture) degrees, and NEOM University in NEOM of Saudi Arabia (2024 – present) by focusing on Digital Thinking as a 2-year CS-X Core program for all students including Arts and Media, and Humanities and Social Sciences.
My educational innovation is forward-thinking. Invited to give 32 keynotes and invited talks and 9 penal discussions – including news interview- at local and international higher education conferences, symposia, summits and forums, published 3 higher education journal publications and 22 foresight reports, whitepapers and academic frameworks.
Rethinking the Learning Culture
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Riding the Digital Wave: Have been championing flexible learning environments - where students can access education anytime, anywhere. SUTD human-centric Cyber-Physical Learning pedagogy under campusX is such an example. This idea aligns perfectly with Gen Z and Millennials’ expectations for autonomy and interactivity in learning. This fits well into the SIT work-learn program.
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“Tinkering” Mentality: Emphasize giving students space and time to explore, experiment, and learn through team-based and hands-on, tech-driven tools both inside and outside classroom. Rather than passive learning, it is about encouraging curiosity through critical thinking, creative problem solving and discovery. This reshaping of learning into an active, playful, and deeply engaging process is forward looking for today’s digital-savvy students.
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Team-based Active Learning: Led many initiatives to advocate for high-impact active and team-based learning that bring abstract academic concepts to life through group discussion - especially useful in design-centric problem-based learning. The new SUTD degree program “Design and AI (DAI)” launched in 2019 is good illustration. This degree program was launched ahead of many LLMs.
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Pedagogical structures that prioritize student empowerment, enabling learners to guide their own educational journeys. Currently, GenAI and other emerging technologies will be considered as an integrated part of curriculum, pedagogy and assessment framework upfront at NEOM U.
SUTD’s Design-Centric Approach
At Singapore University of Technology and Design, as its Founding Associate Provost of Education, I was a key architect of:
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A curriculum built around integrated design thinking, which challenges students to solve real-world problems with creativity and technical depth for user- and human-centric solutions in product, system, service and built-environment.
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Blended learning platforms, combining online modules with collaborative, project-based sessions for in-person and cyber learners. Telepresence Robot Learning System and Cyber-Physical Learning Pedagogy developed under campusX are being deployed.
Broader Vision for Education
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In various panels, I discuss how academic leadership must evolve - not just adopting technology but understanding how students use it to develop the required critical soft skills and mindset.
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Very passionate about educator-industry collaboration, making sure academic content stays relevant to real-world demands and students are future-proof.
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Strong advocate for moving from didactic, content-delivery models to facilitative learning, where instructors are guides, not gatekeepers.
Field Research
Kin-Leong has contributed significantly to the CMOS gate dielectric reliability, specifically leading groundbreaking research in physical characterization and in-situ analysis of dielectric breakdown, recovery, and SET/RESET mechanisms, as well as structural evolution in ultrathin gate oxides, high k dielectrics, and 2D materials using advanced TEM and AFM/STM techniques. He was recognized by the IEEE International Integrated Reliability Workshop (IIRW) as one of the top 20 experts of the Front‐End device reliability (http://www.iirw.org/ref/reliabilityexperts.html) in 2018 and as a panellist of the Reliability Expert Forum (REF) of “Memory Technologies and Reliability” in 2019.
Continue to excel in developing advanced characterization techniques on materials and fabrication like in-situ TEM and nanoscale STM/AFM electrical stressing of oxide breakdown in high-k and 2D dielectrics and tackle complex reliability issues in cutting-edge semiconductor devices. The research extends to emerging technologies including STT-based MgO MRAM, neuromorphic devices for in-memory computation, analog RRAM and ferroelectric devices.
Not just theory — he integrates practical tools and industrial standards into his research through Industrial Postgraduate Programme (IPP) PhD and Master collaboration. Excellent network with industries, especially semiconductor companies – was Lead PI of Chartered-NTU(EEE)-EDB PhD and MEng research program (January 2005 – June 2011), SSMC-NTU(EEE)-EDB MEng research program (July 2004 – June 2009) and SUTD-EDB IPP PhD and MEng research program with GF and AMD (2013-2014). More than 35 PhD/MEng students graduated under these collaborations.
Invited to speak regularly at international semiconductor characterization, reliability and failure analysis conference and symposia.
Early research focused on 1) Self-aligned silicide (SALICIDE) and advanced Ni(alloy) germano/silicides for integrated circuits, 2) Pulsed laser annealing for ultrashallow junction and metal-silicide formation, 3) Electromigration and Stress migration of Cu interconnects, Cu-Cu wafer bonding and TSV and 4) Nanowire/dot-based devices for computational, memory, micro battery, photovoltaic and bio-applications--all focus on semiconductor process and technology.
Overall Publication and Technical Presentation
Scientific Publications, Technical Presentations & Patents
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288 refereed journal publications
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348 conference/summit/forum/workshop presentations/publications
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15 keynote speeches
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120 invited talks and 3 tutorials
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12 panel discussions and news interviews
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6 book chapters
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28 whitepapers/foresight reports/magazine articles/academic frameworks
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44 US patens in semiconductor process and technology
Graduate Theses
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Graduated 42 PhD and 23 Master theses focusing on advanced silicide technology, reliability of ultrathin gate oxides through physical analysis, electro/stress-migration of advanced interconnects
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Graduates contributed significantly to the semiconductor industry in Singapore, Taiwan and China
Education
Doctor of Philosophy
Department of Electrical Engineering, National University of Singapore, March 1994
Bachelor in Engineering (1st Class Honors)
Department of Electrical Engineering, National University of Singapore, July 1989
Advanced Program
Leaders in Urban Governance Program by Centre for Liveable Cities, Singapore
September - October 2014
Awards, Professional Memberships and Advisory & Key Appointments
Honors and Awards
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SUTD Honorary Professor, Singapore University of Technology and Design University, 2023
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Chair Professor in Healthcare by Kwan-In-Thong-Hood-Cho Temple, Singapore University of Technology Design, May 2019 - March 2023
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The COVID-19 Resilience Medal (CRM), Singapore National Awards (COVID-19), 2023
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Service to Education Award, Singapore Ministry of Education, 2023
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The Public Administration Medal (Silver), Singapore National Day Awards, 2016
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Long Service Award 2016/2020, Singapore University of Technology and Design, January 2015/2020
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Chartered Semiconductor Manufacturing Special Settle-in Award, September 1996
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Texas Instrument Augmentation Award, 1990
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National University of Singapore Research Scholarship, July 1989 – January 1993
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National University of Singapore, Faculty of Engineering Book Prize, July 1989
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AT&T Microelectronics’ Scholarship, July 1987 – June 1989
Professional Memberships
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Fellow, ASEAN Academy of Engineering & Technology
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Fellow, Institute of Engineer, Singapore
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Senior Member, The Institute of Electrical and Electronics Engineers, USA
Advisory & Distinguished Appointments
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Chairman, The Governing Board for the National Synchrotron Programme, Singapore
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President, Higher Education Planning in Asia (HEPA) Association
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Board Member, IEEE International Physical and Failure Analysis (IPFA) Symposium
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Member, Editorial Advisory Board of Applied Physics Letters (APL) Electronic Devices
Recent Past
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Member, Engineering Advisory Committee, Ngee Ann Polytechnic Council, November 2021 – January 2024
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Temasek Polytechnics, Singapore, Member of Board of Governors and Chairman, Engineering School Advisory Committee, June 2020 – January 2024
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Chairman, Washington Accord Review Penal for Periodic Review of China Association for Science and Technology (CAST) and China Engineering Education Accreditation Association (CEEAA) (China Association for Science and Technology), Sep 2022 – May 2023
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Chairman of Advisory Board, School of Electrical and Electronics Engineering, Singapore Polytechnic, Singapore, July 2012 – May 2024
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Member, School Advisory Committee, Jurong Pioneer Junior College, Singapore, January 2019 – January 2024
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Distinguished Visiting Academician, Changi General Hospital, Singapore, April 2018 – March 2024
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Judge, Micron Singapore Technical Seminar, Singapore, 2004 – September 2024
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Member, A*STAR Research Entities Audit Committee, Singapore, February 2014 – 2019
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Member, Advisory Panel, Building Construction Authority Academy (BCAA), Singapore, May 2013 – October 2019
Professional Careers & Affiliated Appointments
Employment histories
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Senior Vice Provost for Student Success, NEOM University, Saudi Arabia, February 2024 — Present
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Singapore University of Technology and Design, Singapore, January 2010 — February 2024
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Associate Provost (Digital Learning), January 2022 - February 2024
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Associate Provost (Undergraduate Studies and SUTD Academy), January 2019 — December 2021
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Associate Provost (Education and SUTD Academy), March 2017 — December 2018
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Founding Associate Provost (Education), January 2010 — February 2017
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School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore, February 2002 — December 2009
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Professor, August 2008 — December 2009
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Associate Professor, February 2002 — July 2008
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Director, Nanyang NanoFabrication Center (N2FC), April 2009 — September 2009
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Director, Microelectronics Center, April 2005 — December 2009
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Head, Microelectronics Division, January 2007 – December 2009
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Acting-Head, Microelectronics Division, October 2006 – December 2006
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Deputy-Head, Microelectronics Division, September 2006 – December 2006
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Engineering Manager, Wafer Yield Engineering, Agilent Technologies, Singapore, October 2000 — January 2002
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Section Manager, Yield Engineering at Chartered Semiconductor Manufacturing, Singapore, July 2000 — October 2000
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Department of Electrical Engineering, National University of Singapore, February 1998 — June 2000
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Assistant Professor, August 1999 — June 2000
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Lecturer, February 1998 — July 1999
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R&D Department, Chartered Semiconductor Manufacturing, Singapore, June 1996 — February 1998
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Principal Engineer, January 1998 — February 1998
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Senior Engineer, June 1996 — December 1997
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Failure Analysis and Reliability Department, Institute of Microelectronics, Singapore, February 1993 — May 1996
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Member of Technical Staff, June 1995 — May 1996
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Research Engineer, February 1993 — May 1995
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Training Assistant, AT&T Microelectronics, Singapore, March 1988 — June 1988
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Engineering Assistant, AVIMO, Singapore, March 1987 — June 1987
Alliflated Appointments
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SMA Fellow, Advanced Materials Micro- and Nano-Systems Program at Singapore-MIT Alliance (SMA), April 1999 — December 2011
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Visiting Professor at Nanyang Technological University, Singapore, January 2010 — December 2011
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Visiting Professor at Tokyo Institute of Technology, Japan, February 2009
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Visiting Scientist at MIT, USA, June 2006 — June 2010
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Member, VLSI Committee IEEE Electron Device Society, USA, September 2007 — January 2010
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Distinguished Lecturer, IEEE Electron Device Society, USA, January 2005 — January 2013
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Faculty Associate, Institute of Microelectronics, Singapore, June 2003 — January 2011
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Adjunct Fellow, Department of Electrical and Computing Engineering, National University of Singapore, July 2000 — January 2002
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Adjunct Lecturer, Department of Physics, National University of Singapore, June 1997 — January 1998
Editorial Appointments
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Editor, IEEE Transaction on Device and Materials Reliability (TDMR), August 2009 - present
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Guest Editor, Special Collection on Defect Characterization and Control in 2D materials in npj 2D Materials, January 2025 - February 2025
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Guest Editor, Special Issue on Dielectrics for 2-D Electronics in IEEE Transactions on Electron Devices, April 2023
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Guest Editor, IEEE Transactions on Device and Materials Reliability (TDMR) for International Reliability and Stress-related Phenomena (IRSP) 2018 Conference, December 2018
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Guest Editor, IEEE Transactions on Device and Materials Reliability (TDMR) for IPFA Selected Conference Papers, 2003, 2004, 2005 and 2007
Chair of Conferences, Summits and Forums
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Chair, 2024 Higher Education Planning in Asia (HEPA) Forum, 10-11 April 2024, Aukland, New Zealand
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Chair, 2024 Higher Education Planning in Asia (HEPA) Forum, 13-14 April 2023, Sunshine Coast, Australia
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Co-chair, 2018 ASEAN Engineering Deans Summit (AEDS) and Accreditation & Assessment Workshop (CAFEO 36 supports ‘Master Plan on ASEAN Connectivity 2025’ ), 12-14 November 2018, Singapore
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General Chairman, 2004 IEEE 11th Physical and Failure Analysis of Integrated Circuits (IPFA), 5-8 July 2004, Hsinchu, Taiwan
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Co-General Chairman, 2001 IEEE 8th Physical and Failure Analysis of Integrated Circuits (IPFA), 10-13 July 2001, Singapore
Notable contributions
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Editor, IEEE Transaction on Device and Materials Reliability (TDMR), August 2009 – present.
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Past chair (2022), Chair (2021), Dy-chair (2020) and Technical committee member (2019 and 2023), Neuromorphic Computing Committee, IEEE International Reliability Physics Symposium (IRPS), USA.
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Technical program committee member, IEEE International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2014 – 2023, Taiwan.
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Co-chair and moderator, 2019, 2020 and 2021 IEEE IRPS Neuromorphic Device Reliability Workshop, USA.
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Technical program committee for Reliability, IEEE Electron Devices Technology and Manufacturing (EDTM), 2017 – 2019, Asia.
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Technical committee member, Conventional Gate Dielectrics Committee, 2006, 2007, 2008, 2010, 2011, 2013-2015 and 2019 IEEE International Reliability Physics Symposium (IRPS), USA.
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Co-chair, Gate Dielectrics Committee, 2013 IEEE International Reliability Physics Symposium (IRPS), USA.
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Technical sub-committee member, CMOS & Interconnect Reliability (CIR) Sub-committee, 2007 and 2008 IEEE International Electron Device Meeting (IEDM), USA.
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Co-chair, Novel Gate Stack/Dielectrics and FEOL Reliability and Failure Mechanisms Committee, 2010 IEEE 17th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Chair, Novel Gate Stack/Dielectrics and FEOL Reliability Committee, 2009 IEEE 16th Physical and Failure Analysis of Integrated Circuits (IPFA), Suzhou, China.
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Co-chair, Novel Gate Stack/Dielectrics and FEOL Reliability and Failure Mechanisms Committee, 2008 IEEE 15th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Guest Editor, 2003, 2004, 2005 and 2007 of IEEE Transactions on Device and Materials Reliability.
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Co-chair, Frontend Reliability Committee, 2007 IEEE 14th Physical and Failure Analysis of Integrated Circuits (IPFA), India.
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Co-chair, Novel Device Architectures, Design, Processes, and Characterization Committee, 2006 IEEE 13th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Chair, IC Failure Analysis Committee, 2004 IEEE 11th Physical and Failure Analysis of Integrated Circuits (IPFA), Taiwan.
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Technical committee member, Advanced Interconnects Reliability Committee, 2003 IEEE 10th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Chair, Advanced Interconnects Reliability Committee, 2002 IEEE 9th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
IEEE Society related
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Chair, IEEE joint Rel/EPS/EDS Chapter (2020 and 2021), Singapore.
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Member, IEEE joint Rel/CPMT/EDS Chapter (2007-08, 2010-2019, 2022), Singapore.
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Secretary, IEEE joint Rel/CPMT/EDS Chapter (2006), Singapore.
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Chair, IEEE joint Rel/CPMT/EDS Chapter (2004, 2005 and 2009), Singapore. The Chapter was awarded the IEEE Electron Device Society Best Chapter Award in 2004.
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Treasurer, IEEE joint Rel/CPMT/EDS Chapter (2002 and 2003), Singapore.
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Chapter Executive committee member, IEEE joint Rel/CPMT/EDS (2000-2001), Singapore.
IEEE IPFA and EPTC Conference
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IEEE IPFA Board members – 2001 - present.
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Publicity chair and organizing committee member, 2010 IEEE 17th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Publicity chair and organizing committee member, 2008 IEEE 15th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Publicity chair and organizing committee member, 2006 IEEE 13th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Organizing committee member, 7th Electronics Packaging Technology Conference (EPTC 2005), Singapore.
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Organizing committee member, 6th Electronics Packaging Technology Conference (EPTC 2004), Singapore.
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Publicity chair and organizing committee member, 2005 IEEE 12th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Co-chairman and organizing committee member, 2004 IEEE 11th Physical and Failure Analysis of Integrated Circuits (IPFA), Taiwan.
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Tutorial chair and organizing committee member, 2003 IEEE 10th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Finance chair and organizing committee member, 2002 IEEE 9th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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General chairman, 2001 IEEE 8th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Organizing committee member and local arrangement chair, 1999 IEEE 7th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Organizing committee member, 1997 IEEE 6th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
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Organizing committee member, 1995 IEEE 5th Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore.
Research Recognitions and Awards
Best Papers
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Best Paper Award of 2019 IEEE International Reliability Physics Symposium (IRPS), “Spatio-Temporal Defect Generation Process in Irradiated HfO2 MOS Stacks: Correlated versus Uncorrelated Mechanisms”.
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The Best of Design in Engineering" award of 2012 American Society for Engineering Education (ACEE) conference, "A Symphony of Designiettes: Exploring the Boundaries of Design Thinking in Engineering Education".
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Best Paper (Reliability) award of 2011 IEEE 18th International Physical and Failure Analysis Symposium (IPFA), "Study of the charge leakage of dual layer Pt metal nanocrystal-based high-k/SiO2 flash memory cell - a relaxation current point of view".
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Best Paper (Reliability) award of 2009 IEEE 16th International Physical and Failure Analysis Symposium (IPFA), “Can a MOSFET survive from multiple breakdowns?”.
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Best Paper (Reliability) Award of 2002 IEEE 9th International Physical and Failure Analysis Symposium (IPFA), “Consequence of preferential void formation at the Cu/Si3N4 interface on the multiple failure mechanisms of Cu dual-damascene metallization”.
Highlights
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Top papers for conference highlights of 2018 IEEE International Reliability Physics Symposium (IRPS), “Mechanism of soft and hard breakdown in hexagonal boron nitride 2D dielectrics”, A. Ranjan, N. Raghavan, S.J.O’ Shea, S. Mei, M. Bosman, K. Shubhakar and K.L. Pey.
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Highlight of the IEEE 2008 Electron Device Meeting (IEDM), “The Chemistry of Gate Dielectric Breakdown”, X Li, CH Tung, KL Pey and V. Lo.
Key Scientific Findings of Oxide Breakdown Induced Microstructures of poly-Si/SiOxHy/Si MOSFET

Oxide Breakdown/Recovery and SET/RESET in RRAM by in-situ TEM analysis
DBIE formation in ultrathin gate oxide
Real-time observation of SET in Ni/SiO2/Si MOS


Evidence of multiple SETs/ultrathin oxide breakdown events
Abnomral growth of NiSi filamrent after SET/ultrathin oxide breakdown


Research Awards
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TSMC 2010 Outstanding Student Research Award: Wu Xing on “Physical Analysis of Breakdown in Advanced High-k Gate Dielectric Using Transmission Electron Microscopy and Atomistic Simulations”.
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Top Place in Photo Contest for “Art of Failure Analysis” of 2010 IEEE 17th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).
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Japan Society for the Promotion of Science (JSPS), Visiting Professor, Tokyo Institute of Technology, 2 February – 7 February 2009.
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8th Place in Photo Contest for “Art of Failure Analysis” of 2008 IEEE 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).
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TSMC 2008 Outstanding Student Research Awards:
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A Commendation Prize in Category III: Physics, Chemistry of Material for Nano-Scale Devices by Li Xiang on “Gate dielectric reliability study using TEM and EELS”.
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A Bronze Prize in Category III: Physics, Chemistry of Material for Nano-Scale Devices by Ong Yi Ching on “Scanning Tunneling Microscopy of the Sc2O3/La2O3/SiOx Gate Stack – A Nanoscopic Perspective”.
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Achievements
Peer Reviewed Scientific Publications
Notable publications in physical analysis on breakdown in ultrathin gate dielectrics
Professor Pey has authored over 288 peer-reviewed articles and 6 book chapters mainly related to nanoscale Si-based device reliability issues through physical analysis and semiconductor technology and processing. Three articles are in education innovation and the rest is in specialized research.
Conference/summit/forum/workshop presentations/publications
16 IEEE IEDM and 49 IRPS presentations on nanoscale device reliability & its physical analysis
He has 348 presentations related to his specialized research and education innovation at various international and local conferences, summits, forums and workshops. 317 are in specialized research areas.
Foresight reports/whitepapers/magazine articles/academic frameworks
Recognition in innovation in higher education
He has contributed significantly in the innovation of higher education with 26 foresight reports, whitepapers, and academic frameworks. He published two semiconductor-related articles in magazine.
Invited Talks and Tutorials
15 keynote speeches and 120 invited talks
Professor Pey has been invited as a keynote speaker at 15 conferences and symposia, showcasing his expertise and contributions in semiconductor technology and processing (7) and higher education (8). He conducted 3 tutorials on nanoscopic techniques for study of breakdown in ultrathin gate oxides at international conferences. He delivered another 120 invited talks related to higher education innovation (23) and specialized research (97).
Patents
One company trade secret in silicide cleaning module for CMOS
He holds 44 US patents in areas of nanotechnology and semiconductor technology and processes. Some of them, exemplifying his innovative spirit and technical proficiency especially in self-aligned silicide technology, have been implemented in industrial CMOS fabrication.
Invited panel discussions and news interviews
9 in higher education innovation
He shared regularly at various panel discussions on the development of higher education especially those related to undergraduate programs. He has 3 specialized research panel discussion and news interview.
Impacts
Physical analysis of breakdown in ultrathin gate directrices
Kin-Leong has made pioneering contributions to the atomic-scale physical characterization and in-situ analysis of dielectric breakdown, recovery, and resistive switching phenomena in advanced CMOS gate stacks. By applying high-resolution transmission electron microscopy (TEM), he systematically elucidated the breakdown and recovery mechanisms in poly-Si/SiO₂, SiOxHy, and metal/high-k gate stacks across both planar and FinFET architectures. His meticulous TEM analyses provided the first direct evidence of nanoscale defect formation such as silicon hillocks at transistor electrodes and metal migration, clarifying the sequential progression from stress-induced leakage to soft and progressive breakdown, and ultimately to hard breakdown.
Kin-Leong further propelled the field by developing a comprehensive physical model for dielectric breakdown percolation paths, utilizing electron energy loss spectroscopy within TEM to chemically map the spatial and lateral distribution of oxygen vacancies in ultrathin SiO2 dielectrics. This first-of-its-kind work established oxygen vacancies as the essential constituents of conductive paths responsible for soft breakdown.
His later work in early 2010s on in-situ TEM studies of metal/ultrathin dielectric/Si structures captured the world’s first real-time evolution of breakdown-induced metal-like physical filament, laying the foundational understanding of SET and RESET processes in Resistive RAM. His frontier work provides critical gate-oxide reliability information for advanced CMOS technologies.
This pioneering work, utilizing advanced TEM analysis of oxide failure-induced defects, fundamentally redefined the understanding of gate oxide breakdown in MOSFET devices. The research revealed that MOSFET architecture exhibits exceptional resilience: even when gate oxide ruptures and the poly-Si gate comes into direct contact with the silicon substrate channel or source extension, transistors often maintain partial operability. Even partial or non-physical damage to the gate oxide minimally degrades device performance, allowing circuits to remain largely functional despite elevated leakage.
These insights have profound industry implications. They highlight the critical need for reliability assessment protocols that go beyond standard electrical characterization, advocating for rigorous physical analysis and stringent failure criteria tailored to narrow MOSFETs.
Research on the atomic migration in the advanced Cu interconnects lays a foundation how stress-migration can interact with electromigration and vice versa. Pioneering work in Cu interconnect trees provides a good guideline in designing Cu interconnect for enhanced backend reliability.
Research findings have been presented regularly at IEEE IRPS (49) and IEDM(16), two tflagship conferences in related research fields and many other journal publications in IEEE TED and EDL. One invited talk at IEDM and two at IRPS.
Pioneering educational initiatives in higher education by starting 2 new universities
Founding associate provost in kick starting SUTD in Singapore in 2010. Key architect in incorporating design thinking and innovation into 3 engineering degree programs and one architecture degree program. Graduated about 3500 students by 2023 who work in 22 out of 25 industries in Singapore economy with annual graduate employment rate of more than 90% within 6 months of graduation. Such innovative degree programs meet the 21st century challenges of VOCA world by providing human-centric solutions to solving real-world issues. Obtained ABET-equivalent accreditations for all the 3 engineering degree programs 2 times in 2017 and 2022.
Currently, working in the start-mode of a 2nd new 21st century university in Saudi Arabia focusing on digital thinking as a 2-year CS-X Core foundation for all students (Tech & Design, Computer and Data Science, Business and Innovation, Arts and Media, and Humanidities and Social Science). Completed the framework and planning of an integrated undergraduate degree consisting of the CS-X Core curriculum compulsory for year 1 and 2 and interdisciplinary program for year 3 and 4. Pending the launch under NEOM U in Saudi Arabia.
These 2 new universities will provide pipeline of talents to transform industries to tackle challenges in volatility, uncertainty, complexity, and ambiguity (VOCA) or brittle, anxious, non-linear and incomprehensible (BANI) world by providing human centric innovative solutions.
Talent development for semiconductor research and industry in Asia Pacific
Trained 42 PhD and 23 Master students with 44 US patents. Besides 10 working as academics, most of the graduate students work in the semiconductor industry in Singapore, Taiwan, China, Malaysia and US, contributing significantly to the advancement of semiconductor industry in Asia Pacific. Supervised another 50 final-year graduate thesis in semiconductor area at NTU. Formed the IEEE Student branch and IEEE EDS student society at SUTD to further sustain pipeline of technical expertise for engineering community.
Fostering and sustaining IEEE impact in electron device, and IC reliability and packaging community in Singapore and beyond
Led the joint IEEE REl/EDS/CPMT Singapore Chapter for 5 years (2004, 2005, 2009, 2020 and 2021, and obtained the Best EDS Chapter award in 2024. Hold various executive appointments of the joint Chapter in Singapore since 2000. Contributed significantly to the progress and development of IEEE International Symposium on the Physical and Failure Analysis of IC conference (IPFA) as the General Chair in 2001 in Singapore and co-Chair in 2004 in Taiwan and organizing committee members since 1995. Also, provide oversight of the strategic direction and development of IPFA as its Board member since 2001. This helps to sustain IEEE’s presence in Singapore and Asia Pacific and provides various platforms for professional interaction and engagement, thus contributing to the IEEE growth and society development.
Conducted many IEEE joint Chapter’s outreach programs to engage the undergraduate students at the engineering schools of the universities in Singapore to excite them in joining IEEE as student member. This includes providing them sponsorship for the annual IEEE student free, to be helpers at IPFA conferences, and book prizes as well as engaging them via community and social work. Many of them are aware of IEEE now which provides a pipeline of IEEE members.